Catatan Progress g YD1CHS’s Week End Project Homebrew Poor Man Antenna Analyzer (HPMAA) Homebrew Poor Man Antenna Analyzer (HPMAA)
Based on Vector Analysis Method Started from July 2010
Schematic Diagram
Here is the schematic drawn by EAGLE software for building PCB
Genuine Schematic Diagram
PART 1 PART‐1
Designed by VK5JST
Genuine Schematic Diagram
PART 2 PART‐2
Designed by VK5JST
YD1CHS ‐ Homebrew A Poor Man Antenna Analyzer (HPMAA) – Ver 1.0
Note: Red line indicates additional jumpers that have to be connected
ISP – In Circuit Serial Programming Socket #pin
MCU #pin
Function
1
PB4 (MISO) = 18
2
‐
Vcc +5V
3
‐
‐
4
‐
G Ground d
5
PC6 (Reset) = 1
6
‐
7
PB5 (SCK) = 19
8
‐
9
PB3 (MOSI) = 17
10
‐
MISO – ISP Prog
Reset ‐ ISP Prog Ground SCK ‐ ISP Prog GND MOSI ‐ ISP Prog GND
LCD Interface Socket #pin
MCU #pin
1
PD2 (INT0) 4 PD2 (INT0) = 4
D4 LCD (11) D4 – LCD (11)
2
PD3 (INT1) = 5
D5 – LCD (12)
3
‐
Backlight LCD
4
PD4 (T0) = 6
D6 – LCD (13)
5
‐
Contrast LCD
6
PD6 (AIN0) = 12
D7 – LCD (14)
7
‐
8
PD7 (AIN1) = 13 PD7 (AIN1) = 13
9 10
Function
Ground En LCD (6) En – LCD (6) Vcc +5V
PB0 (ICB) = 14
Vcc +5V
A Homebrew Poor Man Antenna Analyzer – Projects by YD1CHS
Test Bed: • AVR Atmega‐16 • LCD 20x4
START
Welcome Message …
Note: Intentionally, project was designed for AVR ATMEGA‐8 with a 16x2 LCD in order to minimize both size and price. i i i b th i d i
Battery voltage checking algorithm when voltage < 10 algorithm, when voltage < 10 volt, then system will terminate next execution …
During firmware development I used an AVE development, I used an AVE ATMEGA‐16 minimum board with 20x4 LCD as shown by right pictures right pictures. Firmware was written by BASCOM AVR BASCOM AVR.
D Do … Loop L
Display debugging process, both 3rd and 4th message will not be displayed on the 16x2 not be displayed on the 16x2 version. They were displayed here, only for debugging purpose Shown values were purpose. Shown values were generated by artificial inputs.
A Homebrew Poor Man Antenna Analyzer – Projects by YD1CHS HPMAA during debugging, using artificial inputs, that were generated by three adjustabled voltage divider dj bl d l di id circuit (3 potensiometers). The ATMEGA‐16 board and 20 4 LCD 20x4 LCD was shown in the h i th picture.
Table stored debugging data, bl dd b d we can see left table was debugging result, meanwhile right one was i ht mathematically simulation for several investigated inputs values Both gave an inputs values. Both gave an almost similar results.
Week End 28‐29 Agustus 2010 Converted firmware dari ATMEGA‐16 into ATMEGA‐8 and finished PCB Art Work for real design [Solved]. Added a Added a “Debug Debug Menu Menu” by activating PC.5 by activating PC.5 “LOW”, LOW , information displayed on the information displayed on the “Debug Menu” are: clock number during frequency counting, Integer values of Vin, V50 and Vout [Solved]. Added a “Serial Comm To PC Menu” by activating PB.1 “LOW”, in this mode the y g , ATMEGA‐8 send data / logged data into PC, then by a particular software these data could be shown as graphical information [Solved, but untested yet]. Finishing Frequency Counter algorithm using Interupt method at the Timer1 (16 bits – as counter) [Solved].
Lesson Learnt Pada saat menggunakan ATMEGA‐8 di bread‐board, LCD tidak mau diinisiasi saat “Power Up”, namun dapat diinisiasi saat “Reset” – syarat ground yang dipakai reset sejalur dengan ground LCD Æ Solusi: karena clock mikrokontroler bekerja pada sejalur dengan ground LCD Æ Solusi karena clock mikrokontroler bekerja pada band HF (8MHz), maka sambungan harus dibuat sependek mungkin, khusus untuk ground harus dibuat titik koneksi bersama. LCD baru dapat diinisiasi dan bekerja dengan sempurna ketika pin ground LCD secara langsung disambung ke Ground dengan sempurna ketika pin ground LCD secara langsung disambung ke Ground mikrokontroler. Pada frekuensi tinggi kondisi perkabelan sangat kritis [Solved].
Testing Frequency Counter, lumayan FT80‐C: FT80 C: 3.5MHz, FC: 3.501MHz 3.5MHz, FC: 3.501MHz
Rangkaian dikembangkan diatas bread board, yaitu bagian MCU dan Frequency Counter (74HC00 dan 74HC393), sumber sinyal menggunakan FT‐80C b i l k FT 80C
Tampilan dirubah, frekuensi counter menampilkan dalam 3 digit dibelakang koma, sebelumnya hanya 2 digit saja
Kendala utama yang dihadapi dalam eksperimen yaitu menggunakan bread board, sehingga sangat rentan terpengaruh terhadap parasitik dan , gg g p g pp perilaku HF lainnya. Eksperimen diatas ditujukan untuk melakukan debugging terhadap fi firmware yang ditulis di dalam ATMEGA‐8, sementara sisi hardware dit li di d l ATMEGA 8 t i ih d merupakan tantangan tersendiri. Akan dilakukan segera.
ISTIRAHAT … MUDIK LEBARAN DULU …
Disetrika
Direndam
Dijemur PCB dibuat double layer, dengan menggunakan kertas Glossy Foto Paper yang disetrika ke PCB. Siap dibor
Dites, namun frekuensi counter belum diaktifkan counter belum diaktifkan karena rangkaian front end dan pre‐scalernya belum selesai dibuat. Komponen yang dipakai toleransi 10%, sebab menggunakan komponen yang ada di Junk Box saja. saja
Band Frek Select (MHz) 1 2 3 4 5 6
1.74 2.59 3.40 5.30 5.05 7.56 8.17 12.50 25.20 18.75 21.51 32.00
R (51//51) = 25.5 Ohm (Toleransi 10%) (Toleransi 10%) Vin 486 489 486 482 481 484 533 477 478 207 472 232
R (100//100) = 50 Ohm (Toleransi 10%) (Toleransi 10%)
V50 Vout R X SWR Vin 283 158 27 0 1.46 488 280 160 28 0 1.44 493 283 160 28 0 1.44 488 275 161 29 0 1.42 487 280 161 28 0 1.44 485 279 165 29 0 1.42 488 288 176 0 30 >10 532 274 176 32 0 1.36 206 269 177 32 0 1.36 488 284 99 0 26 >10 224 247 203 41 0 1.18 313 126 137 28 45 3.22 286
Remark
V50 Vout R X SWR 214 239 56 0 1.12 212 242 57 0 1.14 213 240 56 0 1.12 209 240 57 0 1.14 211 239 56 0 1.12 212 242 57 0 1.14 216 256 0 59 >10 Why? 137 101 17 32 4.8 Level Dropped? 206 247 59 0 1.18 Frek. Harmonik? 143 120 18 37 4.14 Level Dropped? 214 170 12 37 6.11 Level Dropped? 120 176 60 39 2.5 Level Dropped?
Catatan: • Pada range frekuensi 1.74 Pada range frekuensi 1 74 – 7.56MHz menunjukkan hasil yang baik (blok warna hijau). • Pada Frekuensi > 7.56MHz belum memberikan hasil yang baik. Potensi problem: VCO, Diode Sudah Tidak Linear, dll?
Voltage Regulator Block
Freq Counter External Prescaler & Pre‐Amp
Fine Tunning
Main Tunning
HF VCO Block
VCO Feedback db k Gain
Debugging Switch USART Port
LCD Port
LCD Backlight Vin LCD Contrast
Vout
V50
MCU Block AVR ATMEGA8
ADC Voltage Reference
ISP In ISP – I Circuit Serial Prog
Band Selector
DC Voltage DC Voltage Amp Block
Diode Diode Detector Block
Band 1 sd 4 (1.6 sd 12.5 MHz)
Picture above showed signal shape for the 1st to 4th band. Th h The shapes were perfect f t sinusoidal signal. Meanwhile right picture showed signal shape for the 5th and 6 shape for the 5 and 6th band, band they were unlinear, so that they must have a lot of harmonics. That is why the measurements That is why, the measurements result were always wrong at both bands.
II bought an old and cheap bought an old and cheap oscilloscope, named Kenwood CS‐1100A 100MHz, to evaluate signal shape especially at the signal shape especially at the 5th and 6th band. For both bands the HPMAA were never gave correct calculation. So gave correct calculation. So that, I though at must have been VFO problem, not firmware.
Band 5 sd 6 (12.5 sd 32 MHz)
Evaluate VFO Using Simulation Software, named Circuit Maker
I put scope here …
Schematic was drawn as the original one, but several modifications were done, there are transistor type from PN3563 to 2N3904 due to very hard to find here, R7 10 Ohm to a 1k Ohm VR, which was set around 500 Ohm. At 10 Ohm, the VFO was fail to be generated, since gain intoduced by Q1 and Q2 was too week to start oscilation. The next page show signal generated by VFO at the Buffer‘s Q6 output.
Evaluate VFO Using Simulation Software, named Circuit Maker Note Left picture is output of the VFO with R7 = 10 Ohm (original design), it is fail to generated oscillation. L1 is 50uH, C1 is 50pF. Right picture is R7 = 500 Ohm, we can see that the VFO now g p , oscillation can be generated successfully. The signal waveform is a perfect sinusoid. At real construction, I utilized a 1K Ohm VR (variable resistor) to replace the R7. With VR, it is easier to set an appropriate value to get a perfect VFO oscillation.
R7 = 10 Ohm R7 10 Ohm
R7 = 500 Ohm R7 500 Ohm
To be Continued
