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Nele Mentens 10 juli 1978 Hasselt, België Belg gehuwd met Kamiel Vanderlinden Lukas Vanderlinden, °14.08.2009
[email protected] http://www.esat.kuleuven.be/~nmentens
Opleiding
20 juni 2007: Doctoraat: "Veilig en efficiënt coprocessor ontwerp voor cryptografische toepassingen op FPGA’s". Promotoren: Prof. Bart Preneel and Prof. Ingrid Verbauwhede. 2003-2007: Doctorandus, Katholieke Universiteit Leuven. 2001-2003: Master in de ingenieurswetenschappen (micro-electronica), Katholieke Universiteit Leuven. Masterproef: "Vermogen- en tijdsanalyse van cryptosystemen gebaseerd op elliptische krommen". 1996-2000: Master in de industriële wetenschappen (chipontwerp), Katholieke Hogeschool Limburg. Masterproef: "Ontwerp van een klasse AB opamp in CMOS technologie". 1990-1996: Wetenschappen-Wiskunde, Sint-Fransiscuscollege Heusden-Zolder.
Werkervaring
2007-lopend: Docent, Katholieke Hogeschool Limburg. Geaffilieerd onderzoeker, Katholieke Universiteit Leuven. 2000-2007: Gastdocent, Katholieke Hogeschool Limburg (analoog en digitaal ontwerp). 2000-2001: STIHO-project: "Implementatie in hardware (FPGA) en visualisatie via een webcam en een oscilloscoop van VHDL-code die via het internet wordt ingebracht", Katholieke Hogeschool Limburg.
Onderzoekservaring Onderzoeksprojecten
Coördinatie: -
IWT-Tetra: "STRES: Secure Techniques for Remote configuration of Embedded Systems" Projectleider: KHLim (Nele Mentens) Partners: Erasmushogeschool Brussel, K.U.Leuven Periode: 01.12.’08 - 30.11.’10 Budget KHLim: 137972 euro
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BOF-CREA: "Automatische generatie van grote getallen bibliotheken in hardware voor parameteriseerbare datapaden" Projectleider: KHLim (Nele Mentens, Kris Aerts) ZAP-ondersteuning K.U.Leuven: Prof. Ingrid Verbauwhede Periode: 01.10.’09 - 30.09.’11 Budget KHLim: 149000 euro
Deelname: -
Interreg: "Crossroads Vlaanderen – Zuid-Nederland" (in aanvraag) Hoofdaanvrager: BOM Partners: EVIO, LIOF, NanoHouse, DSP Valley, Hogeschool Zuyd, Karel de Grote Hogeschool, Avans Hogeschool, KHLim, Groep T, Innovatiecentrum Limburg Budget KHLim: 112500 euro
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IWT-EraSME: "Secure and Private Wireless Technologies" voorbereiding) Hoofdaanvrager: Erasmushogeschool Brussel Partners: KHLim, K.U.Leuven, Universidad San Pablo CEU
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EU-FP6: "SCARD: Side Channel Analysis Resistant Design Flow" (deelname aan projectvergaderingen en andere evenementen als K.U.Leuven-onderzoeker) 01.01.’04 - 30.05.’06
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EU-FP6: "ECRYPT: Network of Excellence in Cryptology" (deelname aan projectvergaderingen en andere evenementen als K.U.Leuven-onderzoeker) 01.02.’04 - 31.07.’08
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EU-FP7: "ECRYPT II: Network of Excellence in Cryptology II" (deelname aan projectvergaderingen en andere evenementen als K.U.Leuven-onderzoeker) 01.08.’08 - 31.07.’12
in
Aangevraagd, maar niet aanvaard: -
FWO: "RECRYPT: Herconfiguratie ter Verbetering van Cryptografische Toepassingen" Promotor: Prof. Dirk Stroobandt (UGent) Copromotoren: Prof. Ingrid Verbauwhede (K.U.Leuven), Nele Mentens (KHLim) Budget KHLim: 280000 euro Periode: ’09 - ‘13
Leiderschap
(aanvraag
Onderzoeksgroep ACRO, Embedded Security & Security: -
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Coördinator ACRO: Eric Claesen Aantal personen ACRO: 15 4 onderzoekslijnen: PROFIBUS & PROFINET Competence Center Embedded Systems & Security Vision & Robotics Integrated Automations Coördinator Embedded Systems & Security: Nele Mentens Aantal personen Embedded Systems & Security: 4
Presentaties op Congressen
congres
titel
DDECS
An FPGA implementation of a Montgomery multiplier over GF(2 )
datum
GLSVLSI
An FPGA implementation of an elliptic curve processor over GF(2 ) 26-28.04.'04 Boston (US)
m
plaats
acceptance rate organisatie #deelnemers
18-21.04.'04 Stara Lesna (SK)
m
77 40%
#presentaties #parallelle tracks (inter)nationaal 26
1 internationaal
100
internationaal
n
Serial multiplier architectures over GF(2 ) for elliptic curve MELECON cryptosystems An FPGA implementation of Rijndael: Trade-offs for side-channel security PDS An FPGA implementation of Rijndael: Trade-offs for side-channel security CT-RSA Cracking Unix passwords using FPGA platforms SHARCS Side-channel issues for designing secure hardware implementations IOLTS
09-12.05.'04 Dubrovnik (HR) 18-19.11.'04 Krakau (PL)
internationaal 83%
14-18.02.'05 San Francisco (US) 24-25.02.'05 Parijs (F)
ECRYPT
06-08.07.'05 Saint Raphael (F) Testing framework for eSTREAM profile II candidates 02-03.02.'06 Leuven (B) ECRYPT Time-memory trade-off attack on FPGA platforms: Unix password cracking ARC 01-03.03.'06 Delft (NL) FPGA-oriented secure data path design: Implementation of a public key coprocessor FPL 28-30.08.'06 Madrid (E) 28% New solutions in cryptography USE IT 13.10.'06 Aix-en-Provence (F) Efficient pipelining for modular multiplication architectures in prime fields GLSVLSI 11-13.03.'07 Stresa (I) full papers: 10% Public-key cryptography on the top of a needle ISCAS 27-30.05.'07 New Orleans (US) 49% A side-channel attack resistant programmable PKC coprocessor for IC-SAMOS embedded applications 16-19.07.'07 Samos (GR) 29% A low-cost implementation of Trivium SASC 13-14.02.'08 Lausanne (CH) ECRYPT Power and fault analysis resistance in hardware through dynamic reconfiguration CHES 10-13.08.'08 Washington (US) 25% IACR ProRISC Comparison of two Random Number Generators on an FPGA 27-28.11.'08 Veldhoven (NL) STRES: Secure Techniques for Remote configuration of Embedded ECUMICT Systems 25-26.03.'10 Gent (B) SASC
91
internationaal
10000 (totaal)
25
20 internationaal
120
14
1 internationaal
100
60
internationaal
28
1 internationaal
50
internationaal
85
3 internationaal internationaal
full papers: 34 1200
252
3 internationaal 18 internationaal
26
1 internationaal
23
internationaal
27
1 internationaal nationaal nationaal
Wetenschappelijke dienstverlening
Programme committee SIN/ABG 2007, North Cyprus Programme committee ACM SIN 2009, North Cyprus Reviews voor internationale wetenschappelijke tijdschriften en congressen
Begeleiding van doctoraten
Copromotorschap: -
Doctorandus: Jo Vliegen Promotor-eindverantwoordelijke: Prof. Ingrid Verbauwhede Promotor: Nele Mentens Status: Aanvraag goedgekeurd Startdatum: 01.07.’10
Onderwijsdossier
Lesopdracht 2009-2010 (aantal uren/week op semesterbasis): -
3de jaar academische bachelor elektronica-ICT: Analoge elektronica 3: 1u hoorcollege Analoge elektronica 4: 1u hoorcollege Digitale technieken 4: 2u hoorcollege Digitale technieken 5: 1,5u hoorcollege
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Master elektronica-ICT: Chipontwerp: 2u hoorcollege + 2,5u project Cryptologie en codeertechnieken: 1,75u hoorcollege Capita selecta VLSI: 1u hoorcollege + 0,5u project Analoog chipontwerp: 0,75u hoorcollege
Onderwijsgerichte projecten: -
OOF-projectvoorstel: "DiViDe: Digital Virtual Design lab" (niet aanvaard) Hoofdaanvrager: KHLim Partners: KHK, Lessius Hogeschool, K.U.Leuven
Lessen en seminaries in het buitenland: -
"Cryptographic Systems on FPGAs" REASON Summer School on FPGA-based and Reconfigurable Systems Ljubljana (SLO), 11-15.08.’03
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"Advances in cryptographic coprocessor design on FPGAs" Séminaire de Cryptographie Université de Rennes 1 (F), 27.03.’09
Gevolgde cursussen:
Xilinx professor workshop over "Embedded Design Flow", Mechelen, 2007. Xilinx professor workshop over "Partial Reconfiguration", Delft, 2007. IBBT mini-master cursus "Making Technology Break Through" in samenwerking met Vlerick Leuven Management School, 2006. "Intensive Program on Information and Communication Security (IPICS)", Leuven, 2006. "Intensive Program on Information and Communication Security: Secure Embedded Systems (IPICS)", Graz, 2004. "Low-power course", IMEC, Leuven, 2003.
Praktische kennis Talen:
Nederlands Engels Frans Duits
Lezen 5 4 3 1
Spreken 5 4 3 1
Schrijven 5 4 3 1
5: niveau moedertaal; 1: elementaire kennis
Programmeertalen en computertoepassingen:
VHDL, Java, C Xilinx ISE, EDK, PlanAhead Synopsys Design Compiler LaTeX, Word, Excel, Powerpoint
Prijzen 2003: Laureaat van de KVIV-ingenieursprijzen.
Publicaties 1. A. Touhafi, A. Braeken, G. Cornetta, N. Mentens, K. Steenhaut, "Secure Techniques for Remote configuration of Wireless Embedded Systems", To appear in Handbook of Research on Mobility and Computing: Evolving Technologies and Ubiquitous Impacts, M. M. Cruz-Cunha, F. Moreira (eds.), IGI Global, 23 pages, 2010. 2. D. V. Bailey, B. Baldwin, L. Batina, D. J. Bernstein, P. Birkner, J. W. Bos, G. De Meulenaer, J. Fan, T. Guneysu, F. Gurkaynak, T. Kleinjung, T. Lange, N. Mentens, C. Paar, F. Regazzoni, P. Schwabe, L. Uhsadel, G. Van Damme, "The Certicom Challenges ECC2-X", In the Workshop Record of the ECRYPT Workshop on Special Purpose Hardware for Attacking Cryptographic Systems, 29 pages, 2009. 3. A. Braeken, S. Kubera, F. Trouillez, A. Touhafi, J. Vliegen, N. Mentens, “Secure FPGA Technologies and Techniques”, In the Proceedings of the 19th IEEE International Conference on Field Programmable Logic and Applications (FPL), pp. 560-563, 2009. 4. N. Mentens, D. Schellekens, W. Heedfeld, P. Timmermans, I. Verbauwhede, "Comparison of two Random Number Generators on an FPGA", In the Workshop Record of ProRISC, 3 pages, 2008. 5. N. Mentens, B. Gierlichs, I. Verbauwhede, "Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration", In the Proceedings of the 10th International Workshop on Cryptographic Hardware and Embedded Systems (CHES), E. Oswald, P. Rohatgi (eds.), Lecture Notes in Computer Science 5154, pp. 346-362, Springer-Verlag, 2008. 6. N. Mentens, J. Genoe, B. Preneel, I. Verbauwhede, "A low-cost implementation of Trivium", In the Workshop Record of the ECRYPT Workshop on the State of the Art of Stream Ciphers (SASC), C. De Cannière, O. Dunkelman (eds.), pp. 197-204, 2008. 7. K. Sakiyama, N. Mentens, L. Batina, B. Preneel, I. Verbauwhede, "Reconfigurable Modular Arithmetic Logic Unit Supporting High-performance RSA and ECC over GF(p)", International Journal of Electronics 94(5), pp. 497-510, 2007. 8. N. Mentens, K. Sakiyama, B. Preneel, I. Verbauwhede, "Efficient Pipelining for Modular Multiplication Architectures in Prime Fields", In the Proceedings of the 17th ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 534-539, 2007.
9. L. Batina, J. Guajardo, T. Kerins, N. Mentens, P. Tuyls, I. Verbauwhede, "Public-key Cryptography for RFID-Tags", In the Proceedings of the IEEE International Workshop on Pervasive Computing and Communication Security (PerSec), pp. 217-222, 2007. 10. L. Batina, N. Mentens, K. Sakiyama, B. Preneel, I. Verbauwhede, "Public-key Cryptography on the Top of a Needle", In the Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1831-1834, 2007. 11. N. Mentens, K. Sakiyama, L. Batina, B. Preneel, I. Verbauwhede, "A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications", In the Proceedings of International Symposium on Systems, Architectures, Modeling and Simulation (IC-SAMOS), pp. 194-200, 2007. 12. N. Mentens, L. Batina, B. Preneel, I. Verbauwhede, "Time-memory Trade-off Attack on FPGA Platforms: UNIX Password Cracking", In the Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), K. Bertels, J. M. P. Cardoso, S. Vassiliadis (eds.), Lecture Notes in Computer Science 3985, pp. 323-334, Springer-Verlag, 2006. 13. K. Sakiyama, N. Mentens, L. Batina, B. Preneel, I. Verbauwhede, "Reconfigurable Modular Arithmetic Logic Unit for High-performance Public-key Cryptosystems", In the Proceedings of the International Workshop on Applied Reconfigurable Computing (ARC), K. Bertels, J. M. P. Cardoso, S. Vassiliadis (eds.), Lecture Notes in Computer Science 3985, pp. 323-334, SpringerVerlag, 2006. 14. L. Batina, N. Mentens, K. Sakiyama, B. Preneel, I. Verbauwhede, "Low-cost Elliptic Curve Cryptography for Wireless Sensor Networks", In the Proceedings of the 3rd European Workshop on Security and Privacy in Ad Hoc and Sensor Networks (ESAS), L. Buttyan, V. Gligor, D. Westhoff (eds.), Lecture Notes in Computer Science 4357, pp. 6-17, Springer-Verlag, 2006. 15. L. Batina, N. Mentens, B. Preneel, I. Verbauwhede, "Flexible Hardware Architectures for Curvebased Cryptography", In the Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp. 4839-4842, 2006. 16. N. Mentens, K. Sakiyama, L. Batina, I. Verbauwhede, B. Preneel, "FPGA-oriented Secure Data Path Design: Implementation of a Public Key Coprocessor", In the Proceedings of the 16th IEEE International Conference on Field Programmable Logic and Applications (FPL), pp. 133-138, 2006. 17. L. Batina, S. Kumar, J. Lano, K. Lemke, N. Mentens, C. Paar, B. Preneel, K. Sakiyama, I. Verbauwhede, "Testing Framework for eSTREAM Profile II Candidates", In the Workshop Record of the ECRYPT Workshop on the State of the Art of Stream Ciphers (SASC), 9 pages, 2006. 18. K. Sakiyama, L. Batina, N. Mentens, B. Preneel, I. Verbauwhede, "Small Footprint ALU for Public-key Processors for Pervasive Security", In the Workshop Record of the ECRYPT Workshop on RFID Security, 12 pages, 2006. 19. L. Batina, J. Guajardo, T. Kerins, N. Mentens, P. Tuyls, I. Verbauwhede, "Public Key Cryptography for RFID-Tags", In the Workshop Record of the ECRYPT Workshop on RFID Security, 16 pages, 2006. 20. L. Batina, J. Guajardo, T. Kerins, N. Mentens, P. Tuyls, I. Verbauwhede, "An Elliptic Curve Processor Suitable for RFID-tags", In the Workshop Record of the 1st Benelux Workshop on Information and System Security (WISSec), 14 pages, 2006. 21. N. Mentens, P. Rommens, M. Verhelst, "Aanvallen op een Cryptografische Chip via een Achterpoortje", KVIV Ingenieursblad 2005(1), 7 pages, 2005. 22. N. Mentens, S. B. Örs, B. Preneel, J. Vandewalle, "An FPGA Implementation of a Montgomery Multiplier over GF(2m)", International Journal on Computing and Informatics, Special Issue on Design and Test 23(5-6), pp. 487-499, 2005.
23. L. Batina, N. Mentens, B. Preneel, I. Verbauwhede, "Balanced Algorithms for Side-channel Aware Design of Elliptic Curve Cryptography", IEE Proceedings on Information Security, Special Issue on Cryptographic Algorithms and Architectures for System-on-Chip 152(1), pp. 57-65, 2005. 24. N. Mentens, L. Batina, B. Preneel, I. Verbauwhede, "A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-box", In the Proceedings of the RSA Conference on Topics in Cryptology (CT-RSA), A. Menezes (ed.), Lecture Notes in Computer Science 3376, pp. 323-333, Springer Verlag, 2005. 25. L. Batina, N. Mentens, I. Verbauwhede, "Side-channel Issues for Designing Secure Hardware Implementations", In the Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS), C. Metra, K. Roy, L. Anghel, M. Nicolaidis (eds.), pp. 118-121, IEEE Computer Society Press, 2005. 26. L. Batina, N. Mentens, B. Preneel, I. Verbauwhede, "Side-channel Aware Design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2n)", In the Proceedings of the 16th IEEE International Conference on Application-specific Systems, Architectures, and Processors (ASAP), S. Vassiliadis, N. Dimopoulos, S. Rajopadhye (eds.), pp. 350-355, IEEE Computer Society Press, 2005. 27. N. Mentens, L. Batina, B. Preneel, I. Verbauwhede, "Cracking Unix Passwords using FPGA Platforms", In the Workshop Record of the ECRYPT Workshop on Special Purpose Hardware for Attacking Cryptographic Systems (SHARCS), pp. 83-91, 2005. 28. A. Braeken, J. Lano, N. Mentens, B. Preneel, I. Verbauwhede, "SFINKS: A Synchronous Stream Cipher for Restricted Hardware Environments", In the Workshop Records of the ECRYPT Symmetric Key Encryption Workshop (SKEW), 19 pages, 2005. 29. L. Batina, P. Buysschaert, E. De Mulder, N. Mentens, S. B. Örs, B. Preneel, G. Vandenbosch, I. Verbauwhede, "Side Channel Attacks and Fault Attacks on Cryptographic Algorithms", Revue HF Tijdschrift 2004(3), pp. 36-45, 2004. 30. N. Mentens, S. B. Örs, B. Preneel, J. Vandewalle, "An FPGA Implementation of a Montgomery Multiplier over GF(2m)", In the Proceedings of the 7th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS), pp. 121-128, 2004. 31. N. Mentens, S. B. Örs, B. Preneel, "An FPGA Implementation of an Elliptic Curve Processor over GF(2m)", In the Proceedings of the 14th ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 454-457, 2004. n
32. L. Batina, N. Mentens, S. B. Örs, B. Preneel, "Serial Multiplier Architectures over GF(2 ) for Elliptic Curve Cryptosystems", In the Proceedings of the 12th IEEE Mediterranean Electrotechnical Conference (MELECON), pp. 779-782, 2004. 33. L. Batina, N. Mentens, B. Preneel, I. Verbauwhede, "A New Systolic Architecture for Multiplication in GF(2n)", In the Proceedings of the IFAC Workshop on Programmable Devices and Systems (PDS), pp. 461-466, 2004. 34. N. Mentens, L. Batina, B. Preneel, I. Verbauwhede, "An FPGA Implementation of Rijndael: Tradeoffs for Side-channel Security", In the Proceedings of the IFAC Workshop on Programmable Devices and Systems (PDS), pp. 493-498, 2004. 35. J. Lano, N. Mentens, B. Preneel, I. Verbauwhede, "Power Analysis of Synchronous Stream Ciphers with Resynchronization Mechanism", In the Workshop Record of the ECRYPT Workshop on the State of the Art of Stream Ciphers (SASC), pp. 327-333, 2004. 36. L. Batina, J. Lano, N. Mentens, B. Preneel, I. Verbauwhede, S. B. Örs, "Energy, Performance, Area versus Security Trade-offs for Stream Ciphers", In the Workshop Record of the ECRYPT Workshop on the State of the Art of Stream Ciphers (SASC), pp. 302-310, 2004.
