Mikroprosesor dan Antarmuka
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Dasar Mikroprosesor Intel 8088
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Oleh. Junartho Halomoan (
[email protected])
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Dasar Sistem Komputer [1]
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Dasar Sistem Komputer [2]
Mikroprosesor
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Data Bus Address Bus Control Bus
I/O
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Memory
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Dasar Sistem Komputer [3]
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Dasar Sistem Komputer [4]
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Arsitektur Bus ada 3 buah: Address: If I/O, a value between 0000H and FFFFH is issued. If memory, it depends on the architecture: 20-bits (8086/8088) 24-bits (80286/80386SX) 25-bits (80386SL/SLC/EX) 32-bits (80386DX/80486/Pentium) 36-bits (Pentium Pro/II/III)
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Dasar Sistem Komputer [5]
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Data: 8-bits (8088) 16-bits (8086/80286/80386SX/SL/SLC/EX) 32-bits (80386DX/80486/Pentium) 64-bits (Pentium/Pro/II/III) Control: Most systems have at least 4 control bus connections (active low). MRDC (Memory ReaD Control), MWRC, IORC (I/O Read Control), IOWC (I/O Write Control), .
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Dasar Sistem Komputer [5]
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Dasar Sistem Komputer [6]
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Konfigurasi Pin 8088 [1]
8088
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC A15 A16/S3 A17/S4 A18/S5 A19/S6 SS0 MN/MX RD HOLD HLDA WR IO/M DT/R DEN ALE INTA TEST READY RESET
GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8086
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD HLDA WR M/IO DT/R DEN ALE INTA TEST READY RESET
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD HLDA WR M/IO DT/R DEN ALE INTA TEST READY RESET
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Data Bus
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
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GND A14 A13 A12 A11 A10 A9 A8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
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Konfigurasi Pin 8088 [2]
INTR: Interrupt Request -Aktif pada saat level high -Masukan -Di monitor pada cycle clock terakhir setiap instruksi NMI: Nonmaskable interrupt -Positif Edge triggered signal -Masukan -Tidak dapat di-masked (enable/disable) secara s/w
GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8086
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Konfigurasi Pin 8088 [3]
8086
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD HLDA WR M/IO DT/R DEN ALE INTA TEST READY RESET
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Clock - Mikroprosesor membutuhkan clock untuk sinkronisasi semua aktifitasnya - Maksimum 10 MHz - Clok generator : i8284
GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
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Konfigurasi Pin 8088 [4]
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Reset •Menghentikan aktifitas mp saat itu •masukan •Aktif ‘high’ •Kondisi register di dalam mikroprosesor setelah reset: register
Contents
CS
FFFFH
DS
0000H
SS
0000H
ES
0000H
IP
0000H
FLAG
0000H
QUEUE
Kosong
GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8086
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD HLDA WR M/IO DT/R DEN ALE INTA TEST READY RESET
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Konfigurasi Pin 8088 [5]
GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8086
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD HLDA WR M/IO DT/R DEN ALE INTA TEST READY RESET
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READY: •Masukan •Aktif ‘high’ •Digunakan untuk memasukkan waktu tunggu (wait state), untuk akses memori atau I/O yang lambat.
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Konfigurasi Pin 8088 [6]
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Fungsi pin 24 s/d 31 dari 8088 dan 8086 berubah sesuai mode yang digunakan, max atau min GND AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 NMI INTR CLK GND
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
8086
Mode Min 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
VCC AD15 A16/S3 A17/S4 A18/S5 A19/S6 BHE/S7 MN/MX RD HOLD HLDA WR M/IO DT/R DEN ALE INTA TEST READY RESET
Logic 1
Mode Max
Logic 0
RQ / GT0 RQ / GT1 LOCK S2 S1 S0 QS0 QS1
* Pin-pin diatas digunakan untuk sinyal kontrol memori dan I/O
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Bus Timing [1]
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Writing: Dump address on address bus. Dump data on data bus. Issue a write (WR) and set M/IO to 1.
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Bus Timing [2]
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Reading: Dump address on address bus. Issue a read (RD) and set M/IO to 1. Wait for memory access cycle.
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Bus Timing [3]
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Bus Timing [4]
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During T1: The address is placed on the Address/Data bus. Control signals M/IO, ALE and DT/R specify memory or I/O, latch the address onto the address bus and set the direction of data transfer on data bus. During T2: 8086 issues the RD or WR signal, DEN, and, for a write, the data. DEN enables the memory or I/O device to receive the data for writes and the 8086 to receive the data for reads. During T3: This cycle is provided to allow memory to access data. READY is sampled at the end of T2. If low, T3 becomes a wait state. Otherwise, the data bus is sampled at the end of T3. During T4: All bus signals are deactivated, in preparation for next bus cycle. Data is sampled for reads, writes occur for writes.
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Diagram Internal intel 8088 BIU C-BUS
ES CS SS DS IP
CONTROL SYSTEM
ALU
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SP BP SI DI
AL BL CL DL
OPERAND FLAGS
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AH BH CH DH
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A- BUS
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EU
4 3 2 1
INSTRUCTION STREAM BYTE QUEUE
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Fungsi BIU (BUS Interface Unit)
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Sebagai antarmuka (pengalamatan) dengan peripheral di luar mikroprosesor. Bertanggung jawab terhadap semua operasi bus eksternal, seperti : Instruction fetch Operasi baca-tulis memori atau I/O Antrian instruksi dan perhitungan alamat (PA)
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Fungsi EU (Execution Unit)
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Bertanggung jawab terhadap decoding dan executing instruksi Mengambil instruksi dari Queue Transfer data dari dan ke general purpose Registers Check & update flag . Perhitungan alamat operand (EA) Memberi perintah ke BIU untuk operasi memori atau I/O
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Register 8088/8086 [1]
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Register 8088/8086 [2] Kategori
Bit Nama Register
general
16 8
AX,BX,CX,DX AH,AL,BH,BL,CH,CL,DH,DL
16
SP,BP
index
16
SI,DI
segment
16
CS,DS,SS,ES
instruction
16
IP
flag
16
FR
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pointer
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Catatan : register general 16 bit tidak bisa digunakan bersamaan dengan register general 8 bit, contoh : mov ax,bl tidak dilayani
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Register General Purpose [1]
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EAX: Accumulator: Referenced as EAX, AX, AL or AH. Used for mult, div, etc. Used to hold an offset. EBX: Base Index: Used to hold the offset of a data pointer. ECX: Count: Used to hold the count for some instructions, REP and LOOP. Used to hold the offset of a data pointer.
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Register General Purpose [2]
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EDX: Data: Used to hold a portion of the result for mult, of the operand for div. Used to hold the offset of a data pointer. EBP: Base Pointer: Holds the base pointer for memory data transfers. EDI: Destination Index: Holds the base destination pointer for string instructions. ESI: Source Index: Holds the base source pointer for string instructions.
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Register Special Purpose
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EIP: Instruction Pointer: Points to the next instruction in a code segment. 16-bits (IP) in real mode and 32-bits in protected mode. ESP: Stack Pointer: Used by the stack, call and return instructions. EFLAGS: Store the state of various conditions in the microprocessor
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Register Flag [1]
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5 flag bit yang paling kanan berubah sesudah instruksi operasi aritmatika dan operasi logika sedangkan instruksi operasi transfer data dan kontrol tidak merubah register flag
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Register Flag [2]
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C (Carry): Holds the carry out after addition or the borrow after subtraction. Also indicates error conditions. P (Parity): 0 for odd number of bits and 1 for even. Obsolete feature of the 80x86. A (Auxiliary Carry): Highly specialized flag used by DAA and DAS instructions after BCD addition or subtraction.
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Register Flag [3]
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Z (Zero): 1 if the result of an arithmetic or logic instruction is 0. S (Sign): 1 if the sign of the result of an arith. or logic instruction is negative. T (Trap): Trap enable. The microprocessor interrupts the flow of instructions on conditions indicated by the debug and control registers.
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Register Flag [4]
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I (Interrupt): Controls the operation of the INTR (Interrupt request) pin. If 1, interrupts are enabled. Set by STI and CLI instructions. D (Direction): Selects with increment or decrement mode for the DI and/or SI registers during string instructions. If 1, registers are automatically decremented. Set by STD and CLD instructions. O (Overflow): Set for addition and subtraction instructions.
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Register Segment [1]
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CS (Code Segment): In real mode, this specifies the start of a 64KB memory segment. In protected mode, it selects a descriptor. The code segment is limited to 64KB in the 8086-80286 and 4 GB in the 386 and above.
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Register Segment [2]
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DS (Data Segment): Similar to the CS except this segment holds data. ES (Extra Segment): Data segment used by some string instructions to hold destination data. SS (Stack Segment): Similar to the CS except this segment holds the stack. ESP and EBP hold offsets into this segment. FS and GS: 80386 and up. Allows two additional memory segments to be deÞned.
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Akses Memori
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Sebelum 8088, uP mepunyai memori sekitar 64 kB Digunakan untuk penyimpan : os, program aplikasi dan data
00000
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Peta Alamat Memori & I/O i8088
IP
Data Segment 64 K Byte
AL BL CL DL SP BP SI DI
0000
Code segment 64 k byte
CS DS SS ES
AH BH CH DH
External Memory Address Space
Input / output Address space
Stack segment 64 k Byte
Limit PC 9FFFF
FFFF Extra Segment 64 k Byte
FFFFF
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Peta Alamat I/O i8088/86
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Peta Memori [1]
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FFFFF
?
Data Program Aplikasi Program 00200 Operating System BIOS
00000
8 bit
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Peta Memori [2] - App. 48 kB Aplikasi : 48 kB Dimisalkan pembagian besar memori aplikasi untuk data dan program adalah sebagai berikut: • 10 kB <= data • 38 kB <= program
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Besar memori untuk bagian data biasanya lebih kecil dibandingkan bagian program Tentukan alamat memori program dan data dengan tanpa segmentasi atau menggunakan segmentasi
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Peta Memori [3]- App. 48 kB
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Tanpa segment: Alamat Program
Alamat awal program 200h Alamat akhir program 99FFh
Alamat Data
Alamat awal data 9A00h Alamat akhir data C1FFh
Contoh: Ambil data ke-100 acc
mov acc,[9A64]
Dengan segmen Alamat Program
Alamat awal program 0000h di Code Segment Alamat akhir 97FFh di Code Segment
Alamat Data
Alamat awal data 0000h di Data Segment Alamat akhir data 27FFh
Contoh : Ambil data ke-100 acc
mov acc,[0064]
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Peta Memori [4] - Segmentasi Segmentasi Membagi memori menjadi blok-blok 64 kB secara dinamis Dipisahkan blok memori menjadi blok fungsi
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64 kB untuk program Code Segment 64 kB untuk data Data Segment 64 kB untuk stack Stack Segment 64 kB untuk tambahan data (option) Extra Segment
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• • • •
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Peta Memori [5]-statis/dinamis
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64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB 64 KB
SS 64 KB
ES ES DS
64 KB
SS
CS 64 KB
DS
64 KB
CS
OS
OS
BIOS
BIOS
Statis vs Dinamis
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Peta Memori [6]-MultiSegment Karena tersedia lebih dari 4 segment, maka bisa dibuat lebih dari 1 kelompok segment multi tasking Pindah program (task) hanya mengubah segment
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Setiap program bisa dimulai dari alamat 0000
Program1
Program2
0000
0000
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0000
Program3
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Peta Memori [7]-Contoh Dinamis DS
FFFFF
0064
2070F DS = XXXX
CS DS 0700
20700 DS = 2000
CS DS 0100
10100 DS =1000
CS 00000
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Perhitungan alamat fisik [1] Segmen untuk Program Format : CS : IP IP=95F3 CS=2500
Adder
physical address A19-A0=2E5F3
0
Geser kiri CS satu digit
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Segmen untuk Data
EA=95F3
DS=2500
Adder
0
physical address A19-A0=2E5F3
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Geser kiri DS satu digit
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Format : DS : EA (Effective Address)
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Perhitungan alamat fisik [2] Segmen untuk Stack Format : SS : SP
SP=95F3 SS=2500
Adder
physical address A19-A0=2E5F3
0
Geser kiri SS satu digit
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Perhitungan alamat fisik [3] H/W Segment BIU C-BUS
Program IP offset CS segment
Data
Offset sesuai mode pengalamatannya DS segment
4 3 2 1
INSTRUCTION STREAM BYTE QUEUE
ES CS SS DS IP
CONTROL SYSTEM A- BUS
EU AH BH CH DH
Stack SP offset SS segment
AL BL CL DL
ALU
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SP BP SI DI
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OPERAND FLAGS
Perhitungan alamat fisik [4] BIU
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H/W Alamat
C-BUS
Alamat program IP offset CS segment Alamat Fisik: IP + CS(digeser)
4 3 2 1
INSTRUCTION STREAM BYTE QUEUE
ES CS SS DS IP
CONTROL SYSTEM A- BUS
EU AH BH CH DH
AL BL CL DL SP BP SI DI
ALU OPERAND FLAGS
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Perhitungan alamat fisik [5]
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Contoh: Jika CS=24F6H dan IP=634AH, Tentukan: a) The logical address, b) The offset address c) The physical address, d) The lower range of the code segment e) The upper range of the code segment Solusi a) The logical address/ Alamat Logika ; 24F6:634A b) The offset address/ Alamat Offtset ; 634A c) The Physical address/ Alamat fisik ; 24F60+634A= 2B2AA d) The lower range of the code segment: 24F6:0000 => 24F60+0000 =24F60 e) The upper range of the code segment: 24F6:FFFF => 24F60+FFFF=34F5F
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Perhitungan alamat fisik [6]
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Ciri Alamat Segment: Tidak bisa diletakkan di alamat awal selain xxxx0 Alamat segmen terakhir pasti F000 Contoh : CS= F100 tidak boleh » Min CS:IP F100:0000 alamat fisik F1000 » Maks CS:IP F100:FFFF alamat fisik 100FFF diluar batas maksimum FFFFF
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Instruksi PUSH Asumsi : SS=5FFF SP=1236, AX=24B6,DI=85C2,DX=5F93 Perhatikan isi stack setiap dijalankan perintah sbb: PUSH AX PUSH DI PUSH DX (gunakan prinsip little endian ) START
PUSH AX
PUSH DI
PUSH DX
SS:1235
24
24
24
SS:1234
B6
B6
B6
85
85
C2
C2
SS:1236
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SS:1233
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SS:1232 SS:1231
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SS:1230
SP=1232
93 SP=1230
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SP=1234
5F
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Instruksi POP Asumsi : SP=1230
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Perhatikan isi stack setiap dijalankan perintah berikut : POP AX POP DX POP BX (gunakan prinsip LIFO) START
POP AX
POP DX
POP BX
SS:1236
SS:1235
24
24
24
SS:1234
B6
B6
B6
SS:1233
85
85
SS:1232
C2
SS:1231
C2 5F
SS:1230
93 AX=5F93
DX=85C2
BX=24B6
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Instruksi MOV [1]
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MOV instruction: MOV destination, source ; copy source operand to destination Example: (8-bit ) MOV CL,55H MOV DL,CL MOV BH,DL MOV AH,BH
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Instruksi MOV [2]
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Example: (16-bit) MOV CX,468FH MOV AX,CX MOV BX,AX MOV DX,BX MOV DI,AX MOV SI,DI MOV DS,SI MOV BP,DS
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Instruksi MOV [3]
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Examples (diperiksa Instruksi yang ilegal): MOV BX,14AFH MOV SI,2345H MOV DI,2233H MOV CS,2A3FH MOV DS,CS MOV FR,BX MOV DS,14AFH
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Instruksi ADD [1]
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ADD instruction ADD destination, source ; add the source operand to destination Example 8 bit: MOV AL,24H MOV DL,11H ADD AL,DL MOV CH,24H MOV BL,11H ADD CH,BL MOV CH,24H ADD CH,11H
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Instruksi ADD [2]
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Example 16bit: MOV AX,34EH MOV DX,6A5H ADD DX,AX MOV CX,34EH ADD CX,6A5H
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Q&A uP 8088 [1]
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Q : IO atau Memori yang diakses oleh uP pada saat pertama kali bootup (sesudah reset) ? A : Memori Q : Tahu dari mana yang diakses memori? A : Register CS di isi FFFF Q : Memangnya di peta I/O tidak ada segmen? A : Tidak ada karena peta I/O hanya 64 kB Q : Apa yang anda tahu tentang segmen? Ukuran? Jenis? A : Ukuran segmen 64kB, Jenis 4 : Code, Data, Stack, Extra Q : Alamat (IO / Memori) berapa yang diakses oleh uP pada saat pertama kali bootup (sesudah reset) ? A : Alamat Memori FFFF0 yang diakses oleh uP pada saat pertama kali bootup (sesudah reset)
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Q&A uP 8088 [2]
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Q : kenapa 8088 dibagi menjadi BIU dan EU? A : sesuai fungsi, yaitu BIU menghitung alamat, EU menghitung data Q : apa bedanya ALU di BIU dengan ALU di EU? A : ALU di BIU menggabungkan 16 bit offset dengan 16 bit segmen menjadi 20 bit alamat fisik, sedangkan ALU di EU menghitung data 8/16 bit dengan data 8/16 bit menjadi 8/16/32 bit
Thank You! Please study this subject at home
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